The present invention relates generally to integrated circuit (IC) packages and more specifically to a method of making an array of interconnecting contacts for an IC package such as a Ball Grid Array (BGA) package or a flip chip package.
In the IC packaging industry, there is continuous pressure to reduce the cost of packaging ICs. To accomplish this, a wide variety of package designs have been developed. One of the currently used techniques involves using an array of interconnecting contacts made up of solder balls or solder columns to provide the interconnection between the IC of the package and other electrical components external to the package such as a PC board. Flip chip ICs and BGA packages are two common examples of packages that use these arrays of interconnecting contacts.
The arrays of interconnecting contacts are typically formed using one of two general processes. In the first process, an array of solder balls is formed by forming each of the solder balls individually on corresponding contact pads located either on the IC itself, or on other electrical interconnecting elements of the package such as leads or traces. In the second process, each of the contacts is formed by soldering (typically using a low temperature solder) a pre-formed solder column (typically made from a high temperature solder) to each of the contact pads of the package. Both of these processes may be somewhat time consuming, and therefore more costly, especially as the number of contacts included in the array of interconnecting contacts is increased.
The above described approaches of forming an array of interconnecting contacts result in more cost effective packages than the traditional approach to producing IC packages which utilizes a lead frame and bonding wires to form the interconnection between the IC and other electrical components external to the package. However, as mentioned above, it is desirable to further reduce the costs of packaging ICs wherever possible. The present invention provides methods for further reducing the cost of producing an array of interconnecting contacts for an integrated circuit package such as a BGA package or a flip chip package.